pcs3p8103a general purpose peak emi reduction ic ?2010 scillc. all rights reserved. pu b lication order number: november 2010 C rev. 2 pcs3p8103a/d feat ures generates a 4x low emi spread spectrum clock i nput frequency: 16.667mhz output frequency: 66.66mhz tri-level frequency deviation selection: down spread, center spread and no spread low inherent cycle-to-cycle jitter supply voltage: 3.3v0.3v lvcmos input and output 6l-tsot-23 (6l-tsot-26) package product description the pcs3p8103a is a versatile spread spectrum fre quency modulator designed specifically to provide a 4x output of 66.66mhz from an input clock of 16.667mhz. the pcs3p8103a reduces electromagnetic interference (emi) at the clock source, allowing system wide reduction of emi of down stream clock and data dependent signals. it allows significant system cost savings by reducing the number of circuit board layers, ferrite beads, shielding, and other passive components that are traditionally required to pass emi regulations. the custom device can generate an emi reduced clock from crystal, or system clock. the pcs3p8103a has a 3 level logic control ss% for selecting center spread, down spread and no-spread options. refer to output frequency deviation table . the pcs3p8103a operates from a 3.3v0.3v supply voltage and is available in a 6l-tsot-23 package. application the pcs3p8103a is targeted towards emi management in applications such as lcd panels, mfps, digital copiers, networking, pc peripheral devices, consumer electronics, and embedded controller systems. blo c k diagram crystal oscillator frequency divider feedback divider r modulation cont rol phase detector loop filter vco output divider pll xout vdd ss% xin /clkin modout vss
pcs3p8103a rev. #2 | page 2 of 7 | www.onsemi.com xin / clkin modout 1 2 3 4 5 6 vdd ss% xout pcs3p8103a vss pin configuration pin description pin# pin name type description 1 ss% i tri-level logic input (1-m-0) used to select down spread, no spread, and center spread options. (refer to output frequency deviation selection table). default=m. 2 vss p ground to entire chip. 3 xin / clkin i crystal connection or external clock input. 4 xout o crystal connection. if using an external reference, this pin must be left unconnected. 5 vdd p power supply for the entire chip. 6 modout o spread spectrum clock output. output frequency deviation selection table clkin (mhz) ss%=0 ss%=1 ss%=m center down no spread 16.667 1.2% -0.7% 0 tri-level logic ss% digital input is designed to sense 3 different logic l evels designated as high 1, low 0 and middle m. no external application resistors are needed to implement the 3-level logic control as shown: logic ss% 1 vdd m unconnected 0 vss vdd vss
pcs3p8103a rev. #2 | page 3 of 7 | www.onsemi.com operating conditions symbol parameter min max unit vdd voltage on any input pin with respect to vss 3.0 3.6 v t a operating temperature 0 +70 c c l load capacitance 15 pf c in input capacitance 7 pf absolute maximum ratings symbol parameter rating unit vdd, v in voltage on any pin with respect to ground -0.5 to +4.6 v t stg storage temperature -65 to +125 c t s max. soldering temperature (10 sec) 260 c t j junction temperature 150 c t dv static discharge voltage (as per jedec std 22- a114-b) 2 kv note: these are stress ratings only and are not implied for functional use. exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. dc electrical characteristics symbol parameter min typ max unit vdd supply voltage 3 3.3 3.6 v il input low voltage commercial temperature 0 0.15vdd v industrial temperature 0 0.13 vdd v im input middle voltage 0.4vdd 0.60vdd v ih input high voltage 0.85vdd vdd v v ol output low voltage (modout output) i ol =4ma 0.4 v v oh output high voltage (modout output) i oh = -4ma 2.4 v c in input capacitance (xin and xout) 6 9 pf i dd dynamic supply current (unloaded output) commercial temperature 10 ma industrial temperature 12 ma i cc static supply current (xin / clkin pulled to vss) 0.5 ma note. the voltage on any input or i/o pin cannot exceed the power pin during power up.
pcs3p8103a rev. #2 | page 4 of 7 | www.onsemi.com ac electrical characteristics symbol parameter min typ max unit f in input clock frequency 16.667 mhz f out modout clock 66.66 mhz t lh 1, 2 modout rise time (measured from 20% to 80%) 3 ns t hl 1, 2 modout fall time (measured from 80% to 20%) 2.5 ns t dcin input clock duty cycle(xin/clkin) 4 0 60 % t dcout 1, 2 output clock duty cycle (modout) 40 60 % t jc 2 cy - cy jitter, for modout with spread on 200 350 ps t jp 2 period jitter, for modout with spread off 150 t on 2 pll lock time (stable power supply, valid input clock to valid clock on modout) commercial temp. 2 ms industrial temp. 3 note: 1. parameters are specified with 15pf loaded outputs. 2. parameter is guaranteed by design and characterization. not 100% tested in production. application schematic c v dd 3 2 5 xout xin vss ss% vdd 1 4 6 y1 16.667mhz 0.1f c l c l down spread 66.66mhz vdd modout pcs3p8103a
pcs3p8103a rev. #2 | page 5 of 7 | www.onsemi.com typical crystal specifications fundamental at cut parallel resonant crystal nominal frequency 16.667mhz frequency tolerance 50ppm or better at 25c operating temperature range -25c to +85c storage temperature -40c to +85c load capacitance 18pf shunt capacitance 7pf maximum esr 25 w note: c l is load capacitance and rx is used to prevent oscillations at overtone frequency of the fundamental frequency. t ypical crystal interface circuit c l = 2*(c p C c s ), where c p = load capacitance of crystal. c s = stray capacitance due to c in, pcb, trace, etc. rx c l c l crystal r
pcs3p8103a rev. #2 | page 6 of 7 | www.onsemi.com 6l-tsot-23 package information symbol dimensions inches millimeters min max min max a 0.0295 0.035 0.75 0.90 a1 0.00 0.0039 0.00 0.10 a2 0.0275 0.0314 0.70 0.80 b 0.0157 0.0197 0.40 0.50 b1 0.0118 0.0157 0.30 0.40 c 0.0031 0.0078 0.08 0.20 d 0.1141 2.90 ref e 0.1023 0.1181 2.60 3.00 e1 0.0590 0.0069 1.50 1.70 e 0.0374 0.95 bsc e1 0.0748 1.90 bsc l 0.0118 0.0236 0.30 0.60 l1 0.0236 ref 0.60 ref l2 0.0098 bsc 0.25 bsc r 0.0039 .. 0.10 .. r1 0.0039 0.0098 0.10 0.25 0 8 0 8 y . 0.0039 . 0.10
pcs3p8103a on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. u.s patent pending; timing-safe and active bead are trademarks of pulsecore semiconductor, a wholly owned subsidiary of on semiconductor. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information literature fulfillment: literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone: 303-675-2175 or 800-344-3860 toll free usa/canada fax: 303-675-2176 or 800-344-3867 toll free usa/canada email: orderlit@onsemi.com n. american technical support: 800-282-9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81-3-5773-3850 on semiconductor website: www.onsemi.com order literature: http://www.onsemi.com/orderlit for additional information, please contact your local sales representative or dering code part number marking package type temperature PCS3P8103AG-06JR az1 6l-tsot-23 (6l-tsot-26), tape & reel, green 0c to +70c a microdot placed at the end of last row of marking or just below the last row toward the center of package indicates pb-free.
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